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Disambiguation of "Park, Kwanseo"

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An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS.

, , , , , , , , and . IEEE J. Solid State Circuits, 57 (1): 21-31 (2022)

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Sumee Park

Soo Yong Park University of Stuttgart

 

Other publications of authors with the same name

A 6.7-11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS., , , , and . J. Solid-State Circuits, 53 (10): 2982-2993 (2018)A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOS., , , , and . A-SSCC, page 1-4. IEEE, (2015)Design Techniques for a 6.4-32-Gb/s 0.96-pJ/b Continuous-Rate CDR With Stochastic Frequency-Phase Detector., , , , and . IEEE J. Solid State Circuits, 57 (2): 573-585 (2022)A 2.44-pJ/b 1.62-10-Gb/s Receiver for Next Generation Video Interface Equalizing 23-dB Loss With Adaptive 2-Tap Data DFE and 1-Tap Edge DFE., , , and . IEEE Trans. on Circuits and Systems, 65-II (10): 1295-1299 (2018)A 4-to-20Gb/s 1.87pJ/b Referenceless Digital CDR With Unlimited Frequency Detection Capability in 65nm CMOS., , , , , , and . VLSI Circuits, page 194-. IEEE, (2019)A 2.5-28 Gb/s Multi-Standard Transmitter With Two-Step Time-Multiplexing Driver., , , , , , , , , and . IEEE Trans. on Circuits and Systems, 66-II (12): 1927-1931 (2019)A 0.36 pJ/bit, 0.025 mm2, 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology., , , , , and . IEEE Trans. on Circuits and Systems, 63-I (9): 1393-1403 (2016)A 27.1 mW, 7.5-to-11.1 Gb/s single-loop referenceless CDR with direct Up/dn control., , and . CICC, page 1-4. IEEE, (2017)A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate Injection-Locked CDR With Path Mismatch Tracking Loop in a 28-nm CMOS Technology., , , , , and . J. Solid-State Circuits, 54 (10): 2812-2822 (2019)A 7.6 mW, 414 fs RMS-Jitter 10 GHz Phase-Locked Loop for a 40 Gb/s Serial Link Transmitter Based on a Two-Stage Ring Oscillator in 65 nm CMOS., , , , and . J. Solid-State Circuits, 51 (10): 2357-2367 (2016)