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Disambiguation of "Zeidler, Steffen"

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An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis.

, , , , , and . PATMOS, volume 6448 of Lecture Notes in Computer Science, page 218-227. Springer, (2010)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Hon. -Prof. Dr. -Ing. Gerhard Zeidler University of Stuttgart

Dr. rer. nat. Daniela Zeidler University of Stuttgart

Univ. -Prof. Dr. rer. nat. Steffen Staab University of Stuttgart

Probabilistic Regular Tree Priors for Scientific Symbolic Reasoning, , , and . Preprint, (2023)

Univ. -Prof. Dr. -Ing. Steffen Becker University of Stuttgart

Architecture-based Issue Propagation Analysis, , , and . Proceedings of the 18th European Conference on Software Architecture (ECSA 2024), Springer, Springer, (September 2024)

Steffen Braun University of Stuttgart

 

Other publications of authors with the same name

Enabling functional tests of asynchronous circuits using a test processor solution.. Brandenburg University of Technology, (2013)Rechnergestützter Entwurf von SPS-Programmen mittels Steuernetzen.. Technische Hochschule Karl-Marx-Stadt, Germany, (1988)A Design Preconditioning Flow for Low-Noise Circuits., , , and . DDECS, page 191-196. IEEE Computer Society, (2015)Functional Pattern Generation for Asynchronous Designs in a Test Processor Environment., , , and . Asian Test Symposium, page 296-301. IEEE Computer Society, (2012)Design of a low-power asynchronous elliptic curve cryptography coprocessor., , and . ICECS, page 569-572. IEEE, (2013)An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis., , , , , and . PATMOS, volume 6448 of Lecture Notes in Computer Science, page 218-227. Springer, (2010)Design of a Test Processor for Asynchronous Chip Test., , , , and . Asian Test Symposium, page 244-250. IEEE Computer Society, (2011)A survey about testing asynchronous circuits., and . ECCTD, page 1-4. IEEE, (2015)On-line testing of bundled-data asynchronous handshake protocols., , , and . IOLTS, page 261-267. IEEE Computer Society, (2010)Frequency-Domain Optimization of Digital Switching Noise Based on Clock Scheduling., , , , , , , and . IEEE Trans. on Circuits and Systems, 63-I (7): 982-993 (2016)