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Disambiguation of "Akita, Ippei"

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A 0.338 cm3, Artifact-Free, 64-Contact Neuromodulation Platform for Simultaneous Stimulation and Sensing.

, , , , , , and . IEEE Trans. Biomed. Circuits and Systems, 13 (1): 38-55 (2019)

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Other publications of authors with the same name

A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS., , , and . IEICE Transactions, 96-A (7): 1552-1561 (2013)Current-Steering Digital-to-Analog Converter With a High-PSRR Current Switch., , and . IEEE Trans. on Circuits and Systems, 58-II (11): 724-728 (2011)A current noise reduction technique in chopper instrumentation amplifier for high-impedance sensors., and . IEICE Electronic Express, 12 (11): 20150374 (2015)A 0.6-V Dynamic Biasing Filter With 89-dB Dynamic Range in 0.18-µm CMOS., , and . J. Solid-State Circuits, 44 (10): 2790-2799 (2009)Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators., , and . IEICE Transactions, 90-A (2): 339-350 (2007)A 0.06mm2 14nV/√Hz chopper instrumentation amplifier with automatic differential-pair matching., and . ISSCC, page 178-179. IEEE, (2013)Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter., , and . ISCAS, page 2244-2247. IEEE, (2007)A robust and low-power synchronization technique of coarse-and-fine conversion parts in ring-oscillator-based time-to-digital converters., and . ICECS, page 239-242. IEEE, (2017)A 6Gbps 3mW optical receiver with DCOC-combined ATC in 65nm CMOS., , , , , , and . ESSCIRC, page 343-346. IEEE, (2011)Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems., , , , , and . Sensors, 15 (12): 31821-31832 (2015)