Author of the publication

A Charge-Domain Auto- and Cross-Correlation Based Data Synchronization Scheme With Power- and Area-Efficient PLL for Impulse Radio UWB Receiver.

, , and . J. Solid-State Circuits, 46 (6): 1349-1359 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Compact Modeling of Phase-Locked Loop Frequency Synthesizer for Transient Phase Noise and Jitter Simulation., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (1): 166-170 (2016)A 100Mbps, 0.19mW asynchronous threshold detector with DC power-free pulse discrimination for impulse UWB receiver., , , , , , , and . ASP-DAC, page 97-98. IEEE, (2009)A 315 MHz Power-Gated Ultra Low Power Transceiver in 40 nm CMOS for Wireless Sensor Network., , and . IEICE Transactions, 95-C (6): 1035-1041 (2012)A 107pJ/b 100kb/s 0.18μm Capacitive-Coupling Transceiver for Printable Communication Sheet., , , , , , , , and . ISSCC, page 292-293. IEEE, (2008)0.6 V Voltage Shifter and Clocked Comparator for Sampling Correlation-Based Impulse Radio UWB Receiver., , and . IEICE Transactions, 94-C (6): 985-991 (2011)A 107-pJ/bit 100-kb/s 0.18- muhboxm Capacitive-Coupling Transceiver With Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet., , , , , , , , and . IEEE Trans. on Circuits and Systems, 56-I (11): 2511-2518 (2009)A 100Mb/s 13.7pJ/bit DC-960MHz band plesiochronous IR-UWB receiver with costas-loop based synchronization scheme in 65nm CMOS., , and . CICC, page 1-4. IEEE, (2012)Post-Layout Simulation Time Reduction for Phase-Locked Loop Frequency Synthesizer Using System Identification Techniques., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (11): 1751-1755 (2014)A Charge-Domain Auto- and Cross-Correlation Based Data Synchronization Scheme With Power- and Area-Efficient PLL for Impulse Radio UWB Receiver., , and . J. Solid-State Circuits, 46 (6): 1349-1359 (2011)A 1.76 mW, 100 Mbps Impulse Radio UWB Receiver with Multiple Sampling Correlators Eliminating Need for Phase Synchronization in 65-nm CMOS., , , and . IEICE Transactions, 93-C (6): 796-802 (2010)