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An efficient reconfigurable architecture to implement dense stereo vision algorithm using high-level synthesis.

, , , , and . FPL, page 444-447. IEEE, (2009)

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Wireless sensors networks emulator implemented on a FPGA., , , and . FPT, page 279-282. IEEE, (2010)An Alternative to Sequential Architectures to Improve the Processing Time of Passive Stereovision Algorithms., , , and . FPL, page 1-4. IEEE, (2006)Stereo Vision Algorithm Implementation in FPGA Using Census Transform for Effective Resource Optimization., , , , and . DSD, page 799-805. IEEE Computer Society, (2009)FPGA implementation of mono and stereo inverse perspective mapping for obstacle detection., , , , and . DASIP, page 1-8. IEEE, (2012)An efficient reconfigurable architecture to implement dense stereo vision algorithm using high-level synthesis., , , , and . FPL, page 444-447. IEEE, (2009)Real-time classification based on color and texture attributes on an FPGA-based architecture., , and . DASIP, page 250-257. IEEE, (2010)Human Motion Capture Using 3D Reconstruction Based on Multiple Depth Data., , , , and . SMC, page 870-875. IEEE, (2013)Real-time architecture on FPGA for obstacle detection using inverse perspective mapping., , , and . ICECS, page 788-791. IEEE, (2011)Transmission channel behavioral model for a wireless sensors network simulator., , and . ICECS, page 922-925. IEEE, (2010)