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Disambiguation of "Bystrov, Alexandre V."

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Delay/Phase Regeneration Circuits.

, , , and . ASYNC, page 105-116. IEEE Computer Society, (2007)

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Alexandre Waquet University of Stuttgart

V. Vaikuntanathan

V. Zaverkin

Univ. -Prof. Dr. -Ing. Alexander Verl University of Stuttgart

Software-Defined Control Cabinet : Reprogramming Instead of Replacing, , , and . Production at the Leading Edge of Technology : Proceedings of the 13th Congress of the German Academic Association for Production Technology (WGP), page 438-447. Cham, Springer, (2024)
Software-Defined Control Cabinet : Reprogramming Instead of Replacing, , , and . Production at the Leading Edge of Technology : Proceedings of the 13th Congress of the German Academic Association for Production Technology (WGP), page 438-447. Cham, Springer, (2024)Complex Physics with Graph Networks for Industrial Material Flow Simulation, , , , , and . 16th CIRP Conference on Intelligent Computation in Manufacturing Engineering, 118, page 50-55. Elsevier, (2023)

Univ. -Prof. Dr. Joris van Slageren University of Stuttgart

Electrocatalytic proton reduction: Metal based fused diporphyrins with proton relays for efficient catalysis, , , , , , , , and . Dataset, (2024)Related to: Chandra, S., Singha Hazari, A., Song, Q., Hunger, D., Neuman, N. I., van Slageren, J., Klemm, E. & Sarkar, B. (2023). Remarkable Enhancement of Catalytic Activity of Cu-Complexes in the Electrochemical Hydrogen Evolution Reaction by Using Triply Fused Porphyrin. ChemSusChem 16, e202201146. doi: 10.1002/cssc.202201146.
 

Other publications of authors with the same name

Phase-Encoding for On-Chip Signalling., , , , and . IEEE Trans. on Circuits and Systems, 55-I (2): 535-545 (2008)STG Optimisation in the Direct Mapping of Asynchronous Circuits ., , and . DATE, page 10932-10939. IEEE Computer Society, (2003)Error detection and correction of single event upset (SEU) tolerant latch., , and . IOLTS, page 1-6. IEEE Computer Society, (2012)Implementing Model Checking and Equivalence Checking for Time Petri Nets by the RT-MEC Tool., and . PaCT, volume 1662 of Lecture Notes in Computer Science, page 194-199. Springer, (1999)Synthesis of Asynchronous Circuits with Predictable Latency., and . IWLS, page 239-243. (2002)Low-Cost Online Testing of Asynchronous Handshakes., , , , and . European Test Symposium, page 225-232. IEEE Computer Society, (2006)Analysis of the oscillation problem in tri-flops., , , and . ISCAS (1), page 381-384. IEEE, (2002)On-chip structures for timing measurement and test., , , , and . Microprocessors and Microsystems, 27 (9): 473-483 (2003)Design and Analysis of a Self-Timed Duplex Communication System., , , and . IEEE Trans. Computers, 53 (7): 798-814 (2004)A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits., , , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 471-480. Springer, (2004)