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A phase-locked frequency divide-by-3 optical parametric oscillator.

, , , , and . IEEE Trans. Instrumentation and Measurement, 50 (2): 548-551 (2001)

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Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops., , , and . CGO, page 175-188. IEEE Computer Society, (2004)Software-Pipelining on Multi-Core Architectures., and . PACT, page 39-48. IEEE Computer Society, (2007)Speculative Prefetching of Induction Pointers., , , , , and . CC, volume 2027 of Lecture Notes in Computer Science, page 289-303. Springer, (2001)Fine-Grain Stacked Register Allocation for the Itanium Architecture., , and . LCPC, volume 2481 of Lecture Notes in Computer Science, page 344-361. Springer, (2002)Register allocation for software pipelined multi-dimensional loops., , and . PLDI, page 154-167. ACM, (2005)Single-Dimension Software Pipelining for Multi-Dimensional Loops., , , , and . CGO, page 163-174. IEEE Computer Society, (2004)A phase-locked frequency divide-by-3 optical parametric oscillator., , , , and . IEEE Trans. Instrumentation and Measurement, 50 (2): 548-551 (2001)Register allocation for software pipelined multidimensional loops., , and . ACM Trans. Program. Lang. Syst., 30 (4): 23:1-23:68 (2008)Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture Design., and . LCPC, volume 4339 of Lecture Notes in Computer Science, page 17-31. Springer, (2005)Single-dimension software pipelining for multidimensional loops., , , , and . TACO, 4 (1): 7 (2007)