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Memory access optimization in compilation for coarse-grained reconfigurable architectures.

, , , and . ACM Trans. Design Autom. Electr. Syst., 16 (4): 42:1-42:27 (2011)

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Selective validations for efficient protections on Coarse-Grained Reconfigurable Architectures., , , , , , and . ASAP, page 95-98. IEEE Computer Society, (2013)An integrated hardware-software cosimulation environment for heterogeneous systems prototyping., , , , , , and . ASP-DAC, ACM, (1995)Orthogonal Instruction Encoding for a 16-bit Embedded Processor with Dynamic Implied Addressing Mode., , , , and . HPCC, page 545-550. IEEE, (2009)I2CRF: Incremental interconnect customization for embedded reconfigurable fabrics., , , , , , and . DATE, page 1346-1351. IEEE, (2011)Achieving Stagnation-Free Intermittent Computation with Boundary-Free Adaptive Execution., , , and . RTAS, page 331-344. IEEE, (2019)An integrated hardware-software cosimulation environment with automated interface generation., , , and . RSP, page 66-71. IEEE Computer Society, (1996)Operation and data mapping for CGRAs with multi-bank memory., , , and . LCTES, page 17-26. ACM, (2010)Exploiting Both Pipelining and Data Parallelism with SIMD Reconfigurable Architecture., , , , , and . ARC, volume 7199 of Lecture Notes in Computer Science, page 40-52. Springer, (2012)Memory-Aware Application Mapping on Coarse-Grained Reconfigurable Arrays., , , , and . HiPEAC, volume 5952 of Lecture Notes in Computer Science, page 171-185. Springer, (2010)An Integrated Cosimulation Environment for Heterogeneous Systems Prototyping., , , , and . Design Autom. for Emb. Sys., 3 (2-3): 163-186 (1998)