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Disambiguation of "Pande, Partha Pratim"

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Reliability and performance trade-offs for 3D NoC-enabled multicore chips.

, , , and . DATE, page 1429-1432. IEEE, (2016)

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Michael Pandey University of Stuttgart

 

Other publications of authors with the same name

Novel interconnect infrastructures for massive multicore chips - an overview., , , , and . ISCAS, page 2777-2780. IEEE, (2008)Editorial.. IEEE Trans. Multi-Scale Computing Systems, 2 (1): 1 (2016)NoC-enabled multicore architectures for stochastic analysis of biomolecular reactions., , , and . DATE, page 1102-1107. ACM, (2015)Sustainable and Reliable On-Chip Wireless Communication Infrastructure for Massive Multi-core Systems., , , and . Evolutionary Based Solutions for Green Computing, volume 432 of Studies in Computational Intelligence, Springer, (2013)Wireless NoC Platforms With Dynamic Task Allocation for Maximum Likelihood Phylogeny Reconstruction., , and . IEEE Design & Test, 31 (3): 54-64 (2014)Timing analysis of network on chip architectures for MP-SoC platforms., , , and . Microelectronics Journal, 36 (9): 833-845 (2005)Design of Low power & Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding., , , , and . DFT, page 466-476. IEEE Computer Society, (2006)An energy-efficient millimeter-wave wireless NoC with congestion-aware routing and DVFS., , , , and . NOCS, page 192-193. IEEE, (2014)On-Chip Network-Enabled Multicore Platforms Targeting Maximum Likelihood Phylogeny Reconstruction., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (7): 1061-1073 (2012)Machine Learning and Manycore Systems Design: A Serendipitous Symbiosis., , , , and . IEEE Computer, 51 (7): 66-77 (2018)