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Scalable conditional equivalence checking: An automated invariant-generation based approach.

, , , , and . FMCAD, page 120-127. IEEE, (2009)

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Specifying and Verifying Systems with Multiple Clocks., , and . ICCD, page 48-. IEEE Computer Society, (2003)Efficient Verification of Sequential and Concurrent C Programs., , , , , and . Formal Methods in System Design, 25 (2-3): 129-166 (2004)Static Analysis for State-Space Reductions Preserving Temporal Logics., and . Formal Methods in System Design, 25 (1): 67-96 (2004)Scalable conditional equivalence checking: An automated invariant-generation based approach., , , , and . FMCAD, page 120-127. IEEE, (2009)Preface., and . Formal Methods in System Design, 39 (2): 115-116 (2011)Reproducing Synchronization Bugs with Model Checking., , and . CHARME, volume 2144 of Lecture Notes in Computer Science, page 98-103. Springer, (2001)Verifying Behavioral UML Systems via CEGAR., , and . IFM, volume 8739 of Lecture Notes in Computer Science, page 139-154. Springer, (2014)Assumption-based distribution of CTL model checking., , and . STTT, 7 (1): 61-73 (2005)SAT-based synthesis of clock gating functions using 3-valued abstraction., , and . FMCAD, page 198-204. IEEE, (2009)COOL: A Model-Driven and Automated System for Guided and Verifiable Cloud Solution Design., , , , , , , and . ICSOC Workshops, volume 10380 of Lecture Notes in Computer Science, page 194-198. Springer, (2016)