PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Jaiswal, Akhilesh"

Author of the publication

copydeleteadd this publication to your clipboard
8T SRAM Cell as a Multi-bit Dot Product Engine for Beyond von-Neumann Computing.

, , , and . CoRR, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Jaiswal, Akhilesh
add a person with the name Jaiswal, Akhilesh
 

Other publications of authors with the same name

Energy Efficient Neural Computing: A Study of Cross-Layer Approximations., , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 796-809 (2018)Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays., , , , , , and . IEEE Trans. on Circuits and Systems, 66-I (8): 3064-3076 (2019)X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories., , and . CoRR, (2017)Ising spin model using Spin-Hall Effect (SHE) induced magnetization reversal in Magnetic-Tunnel-Junction., , and . CoRR, (2016)CryoCiM: Cryogenic Compute-in-Memory based on the Quantum Anomalous Hall Effect., , , , and . CoRR, (2021)Proposal for a Leaky-Integrate-Fire Spiking Neuron based on Magneto-Electric Switching of Ferro-magnets., , , and . CoRR, (2016)MESL: Proposal for a Non-volatile Cascadable Magneto-Electric Spin Logic., and . CoRR, (2016)Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM., , , , and . ACM Great Lakes Symposium on VLSI, page 371. ACM, (2019)Spin transfer torque memories for on-chip caches: Prospects and perspectives., and . LATS, page 7. IEEE, (2016)Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays., , , , and . CoRR, (2018)