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Disambiguation of "Sze, Chin Ngai"

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A methodology for propagating design tolerances to shape tolerances for use in manufacturing.

, , , , and . DATE, page 1273-1278. IEEE, (2010)

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Haripriya Chinnaraj University of Stuttgart

Konstantin Szengel University of Stuttgart

 

Other publications of authors with the same name

Fast Algorithms for Slew-Constrained Minimum Cost Buffering., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (11): 2009-2022 (2007)Improved alternative wiring scheme applying dominator relationship., and . ASP-DAC, page 473-478. ACM, (2001)Path-Based Buffer Insertion., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (7): 1346-1355 (2007)A methodology for propagating design tolerances to shape tolerances for use in manufacturing., , , , and . DATE, page 1273-1278. IEEE, (2010)Navigating Register Placement for Low Power Clock Network Design., , , , , , and . IEICE Transactions, 88-A (12): 3405-3411 (2005)Placement: Hot or Not?, , , , , and . ICCAD, page 283-290. ACM, (2012)Guest Editorial Special Section on Contemporary and Emerging Issues in Physical Design., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (4): 493-494 (2014)Wire synthesizable global routing for timing closure., and . ASP-DAC, page 545-550. IEEE, (2011)Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization., , , , , and . ACM Great Lakes Symposium on VLSI, page 199-204. ACM, (2011)Performance-driven multi-level clustering for combinational circuits., and . ASP-DAC, page 729-740. ACM, (2003)