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Exploiting Multiple Write Modes of Nonvolatile Main Memory in Embedded Systems.

, , , , and . ACM Trans. Embedded Comput. Syst., 16 (4): 110:1-110:26 (2017)

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Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge., , , and . IEEE Computer, 44 (2): 46-53 (2011)Qualifying non-volatile register files for embedded systems through compiler-directed write minimization and balancing., and . VLSI-SoC, page 86-91. IEEE, (2015)Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs., , , and . FPL, page 1-8. IEEE, (2015)Frugal but flexible multicore topologies in support of resource variation-driven adaptivity., and . DATE, page 1255-1260. IEEE, (2011)Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units., , , , and . ASP-DAC, page 316-321. IEEE, (2015)ErasuCrypto: A Light-weight Secure Data Deletion Scheme for Solid State Drives., , and . PoPETs, 2017 (1): 132-148 (2017)Architecting data placement in SSDs for efficient secure deletion implementation., , and . ICCAD, page 42. ACM, (2018)Improving multilevel PCM reliability through age-aware reading and writing strategies., and . ICCD, page 264-269. IEEE Computer Society, (2014)A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization., and . CASES, page 11-20. ACM, (2008)Leveraging Compiler Optimizations to Reduce Runtime Fault Recovery Overhead., , , and . DAC, page 20:1-20:6. ACM, (2017)