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Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems.

, , and . ITC, page 472-478. IEEE Computer Society, (2004)

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Constructing spare sharing networks for reliability enhancement of scalable systems., and . SiPS, page 336-341. IEEE, (2013)Defect-tolerant logic hardening for crossbar-based nanosystems., and . DATE, page 1801-1806. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Defect-tolerant logic implementation onto nanocrossbars by exploiting mapping and morphing simultaneously., and . ICCAD, page 456-462. IEEE Computer Society, (2011)Spare sharing network enhancement for scalable systems., and . DFTS, page 249-254. IEEE Computer Society, (2013)Logic Mapping in Crossbar-Based Nanoarchitectures., , and . IEEE Design & Test of Computers, 26 (1): 68-77 (2009)Locality aware redundancy allocation in nanoelectronic systems., , and . NANOARCH, page 24-31. IEEE Computer Society, (2008)Runtime analysis for defect-tolerant logic mapping on nanoscale crossbar architectures., and . NANOARCH, page 75-78. IEEE Computer Society, (2009)The Existence of Universally Agreed Fairest Semi-matchings in Any Given Bipartite Graph., , and . COCOON, volume 10392 of Lecture Notes in Computer Science, page 529-541. Springer, (2017)Nanofabric Topologies and Reconfiguration Algorithms to Support Dynamically Adaptive Fault Tolerance., , and . VTS, page 214-221. IEEE Computer Society, (2006)Virtual Compression through Test Vector Stitching for Scan Based Designs., and . DATE, page 10104-10109. IEEE Computer Society, (2003)