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Disambiguation of "Li, Jin-Fu"

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A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories.

, , , and . MTDT, page 68-. IEEE Computer Society, (2002)

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M.Sc. Yunxuan Li University of Stuttgart

Dr. Liwei Fu University of Stuttgart

Yu Li University of Stuttgart

Dr. Xinxin Jing University of Stuttgart

Zheng Li University of Stuttgart

 

Other publications of authors with the same name

A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy., , , , , , and . ITC, page 393-402. IEEE Computer Society, (2003)Testing priority address encoder faults of content addressable memories.. ITC, page 8. IEEE Computer Society, (2005)Disturbance fault testing on various NAND flash memories., and . European Test Symposium, page 1. IEEE Computer Society, (2012)A hybrid ECC and redundancy technique for reducing refresh power of DRAMs., , , , , , , and . VTS, page 1-6. IEEE Computer Society, (2013)Testing Inter-Word Coupling Faults of Wide I/O DRAMs., , and . ATS, page 67-72. IEEE Computer Society, (2015)A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories., , , and . IOLTW, page 262-. IEEE Computer Society, (2002)A built-in self-repair design for RAMs with 2-D redundancy., , , and . IEEE Trans. VLSI Syst., 13 (6): 742-745 (2005)Fault modeling and testing of resistive nonvolatile-8T SRAMs., , and . VTS, page 1-6. IEEE Computer Society, (2016)Special session 4C: Hot topic 3D-IC design and test., , , , and . VTS, page 1. IEEE Computer Society, (2013)A built-in self-repair scheme for DRAMs with spare rows, columns, and bits., , , , , and . ITC, page 1-7. IEEE, (2016)