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An Improved Reduction Algorithm With Deeply Pipelined Operators., , and . SMC, page 3060-3065. IEEE, (2009)Measuring the Accuracy and Efficiency of the Data Dependence Tests., and . ISCA PDCS, page 211-218. ISCA, (2001)Super fast hardware string matching., , , and . FPT, page 385-388. IEEE, (2006)Scheduling Acyclic Task Graphs on Distributed Memory Parallel Architectures., and . Parallel Processing of Discrete Optimization Problems, volume 22 of DIMACS Series in Discrete Mathematics and Theoretical Computer Science, page 289-304. DIMACS/AMS, (1994)Program Repartitioning on Varying Communication Cost Parallel Architectures., and . J. Parallel Distrib. Comput., 33 (2): 205-213 (1996)Scalable matrix decompositions with multiple cores on FPGAs., , and . Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-B): 887-898 (2013)Compilation techniques for parallel systems., , , and . Parallel Computing, 25 (13-14): 1741-1783 (1999)Data Dependence Analysis for Complex Loop Regions., and . ICPP, page 195-204. IEEE Computer Society, (2001)Safe bounds check annotations., , , and . Concurrency and Computation: Practice and Experience, 21 (1): 41-57 (2009)Enhancing the Role of Inlining in Effective Interprocedural Parallelization., , , and . ICPP, page 265-274. IEEE Computer Society, (2011)