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Disambiguation of "Göhringer, Diana"

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A Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip.

, , , and . FCCM, page 259-262. IEEE Computer Society, (2010)

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Dr. phil. Diana Wagner University of Stuttgart

Diana Wang University of Stuttgart

 

Other publications of authors with the same name

Using JSON to manage communication between services in the Internet of Things., , and . ReCoSoC, page 1-4. IEEE, (2014)Parallel and distributed simulation of networked multi-core systems., and . ISSoC, page 1-5. IEEE, (2014)MPSoCSim: An extended OVP simulator for modeling and evaluation of Network-on-Chip based heterogeneous MPSoCs., , , and . SAMOS, page 390-395. IEEE, (2015)Special session on "programming paradigms for reconfigurable multi-core embedded systems"., and . ICSAMOS, page 227. IEEE, (2012)Computation and communication challenges to deploy robots in assisted living environments., , , , , , , , , and 2 other author(s). DATE, page 888-893. IEEE, (2016)A flexible approach for compiling scilab to reconfigurable multi-core embedded systems., , , , , , , , , and 11 other author(s). ReCoSoC, page 1-8. IEEE, (2012)Development of advanced driver assistance systems using LabVIEW and a car simulator., , , and . WESE, page 1:1-1:6. ACM, (2016)Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine., , and . Dynamically Reconfigurable Architectures, volume 06141 of Dagstuhl Seminar Proceedings, Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany, (2006)Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support., , and . Multiprocessor System-on-Chip, Springer, (2011)Inspection of Partial Bitstreams for FPGAs Using Artificial Neural Networks., , , , and . IPDPS Workshops, page 83-86. IEEE, (2019)