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Physical-design-friendly hierarchical logic built-in self-test - A case study., , , , , , , , , and 1 other author(s). ISQED, page 1-6. IEEE, (2012)System Level LBIST Implementation., , and . ATS, page 263. IEEE Computer Society, (2008)Logic BIST Architecture for System-Level Test and Diagnosis., , , , , , , , , and 5 other author(s). Asian Test Symposium, page 21-26. IEEE Computer Society, (2009)Volatility Forecasts in Financial Time Series with HMM-GARCH Models., and . IDEAL, volume 3177 of Lecture Notes in Computer Science, page 807-812. Springer, (2004)