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Disambiguation of "Sinha, Debjit"

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Impact of Modern Process Technologies on the Electrical Parameters of Interconnects.

, , , , , and . VLSI Design, page 875-880. IEEE Computer Society, (2007)

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Sakshi Sinha University of Stuttgart

 

Other publications of authors with the same name

Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (3): 447-455 (2007)Gate-size optimization under timing constraints for coupling-noise reduction., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 25 (6): 1064-1074 (2006)Statistical Timing Yield Optimization by Gate Sizing., , and . IEEE Trans. VLSI Syst., 14 (10): 1140-1146 (2006)Driver waveform computation for timing analysis with multiple voltage threshold driver models., , , , , and . DAC, page 425-428. ACM, (2008)Constrained aggressor set selection for maximum coupling noise., , , , and . ICCAD, page 790-796. IEEE Computer Society, (2008)Gate sizing for crosstalk reduction under timing constraints by Lagrangian relaxation., and . ICCAD, page 14-19. IEEE Computer Society / ACM, (2004)Advances in Computation of the Maximum of a Set of Random Variables., , and . ISQED, page 306-311. IEEE Computer Society, (2006)Smart bit-width allocation for low power optimization in a systemc based ASIC design environment., , , and . DATE, page 618-623. European Design and Automation Association, Leuven, Belgium, (2006)A unified framework for statistical timing analysis with coupling and multiple input switching., and . ICCAD, page 837-843. IEEE Computer Society, (2005)An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design., , and . FPGA, page 256. ACM, (2004)