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Disambiguation of "Rudnick, Elizabeth M."

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A Gate-Level Simulation Environment for Alpha-Particle-Induced Transient Faults.

, , , , and . IEEE Trans. Computers, 45 (11): 1248-1256 (1996)

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Sebastian Rudnick University of Stuttgart

Elizabeth Goldstein University of Stuttgart

M. Nudischer

M. Kratzer

M. Liewald

 

Other publications of authors with the same name

Compact Test Generation Using a Frozen Clock Testing Strategy., and . J. Inf. Sci. Eng., 16 (5): 703-717 (2000)A genetic algorithm framework for test generation., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 16 (9): 1034-1044 (1997)Automatic Bias Generation Using Pipeline Instruction State Coverage for Biased Random Instruction Generation., , and . IOLTW, page 65-. IEEE Computer Society, (2001)Diagnostic Fault Simulation of Sequential Circuits., , and . ITC, page 178-186. IEEE Computer Society, (1992)K2: an estimator for peak sustainable power of VLSI circuits., , and . ISLPED, page 178-183. ACM, (1997)Enhancing high-level control-flow for improved testability., , and . ICCAD, page 322-328. IEEE Computer Society / ACM, (1996)A data acquisition methodology for on-chip repair of embedded memories., and . ACM Trans. Design Autom. Electr. Syst., 8 (4): 560-576 (2003)A Diagnostic Fault Simulator for Fast Diagnosis of Bridge Faults., and . VLSI Design, page 498-505. IEEE Computer Society, (1999)Application of Simple Genetic Algorithms to Sequential Circuit Test Generation., , , and . EDAC-ETC-EUROASIC, page 40-45. IEEE Computer Society, (1994)Peak power estimation of VLSI circuits: new peak power measures., , and . IEEE Trans. VLSI Syst., 8 (4): 435-439 (2000)