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Disambiguation of "Becker, Jürgen"

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Adaptive DMA-based I/O interfaces for data stream handling in multi-grained reconfigurable hardware architectures.

, , and . SBCCI, page 141-146. ACM, (2004)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

apl. Prof. Dr. Jürgen Pleiss University of Stuttgart

Univ. -Prof. Dr. Jürgen Pafel University of Stuttgart

Dr. rer. nat. Jürgen Steinwandel University of Stuttgart

Hon. -Prof. Dr. Jürgen Hammer University of Stuttgart

Hon. -Prof. Dr. Jürgen Blum University of Stuttgart

 

Other publications of authors with the same name

From Scilab to multicore embedded systems: Algorithms and methodologies., , , , , , , , , and 10 other author(s). ICSAMOS, page 268-275. IEEE, (2012)Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems., , , , , and . Int. J. Reconfig. Comp., (2011)Selected Papers from the Symposium on Integrated Circuits and Systems Design (SBCCI 2011)., , , , and . Int. J. Reconfig. Comp., (2013)Evaluation of the Reconfiguration of the Data Acquisition System for 3D USCT., , , , , and . Int. J. Reconfig. Comp., (2011)A Security Scheme for Dependable Key Insertion in Mobile Embedded Devices., , , , , and . Int. J. Reconfig. Comp., (2011)High-performance computing using a reconfigurable accelerator., , , and . Concurrency - Practice and Experience, 8 (6): 429-443 (1996)Virtual networks - distributed communication resource management., , , , , , , and . TRETS, 6 (2): 8:1-8:14 (2013)Guest Editorial ARC 2009., , , and . TRETS, 4 (1): 1:1-1:2 (2010)JITPR: A framework for supporting fast application's implementation onto FPGAs., , , , , and . TRETS, 6 (2): 7:1-7:12 (2013)Realtime configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation., , and . IJES, 1 (3/4): 263-273 (2005)