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Disambiguation of "Mandal, Debashis"

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Low-Power/Low-Voltage Integrated CMOS Sense Resistor-Free Analog Power/Current Sensor Compatible With High-Voltage Switching DC-DC Converter.

, , , and . IEEE Trans. on Circuits and Systems, 66-I (6): 2208-2218 (2019)

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Dr. phil. Subrata Mandal University of Stuttgart

 

Other publications of authors with the same name

High voltage tolerant output buffer design for mixed voltage interfaces., and . ISCAS (5), page 4277-4280. IEEE, (2005)A 100-mA, 99.11% Current Efficiency, 2-mVpp Ripple Digitally Controlled LDO With Active Ripple Suppression., , , and . IEEE Trans. VLSI Syst., 25 (2): 696-704 (2017)A Disturbance-Free Built-In Self-Test and Diagnosis Technique for DC-DC Converters., , , , , , and . ACM Trans. Design Autom. Electr. Syst., 23 (2): 25:1-25:22 (2018)Adaptively Biased Output Cap-Less NMOS LDO With 19 ns Settling Time., , , and . IEEE Trans. on Circuits and Systems, 66-II (2): 167-171 (2019)Disturbance-free BIST for loop characterization of DC-DC buck converters., , , , , , , and . VTS, page 1-6. IEEE Computer Society, (2015)Sense resistor-free analog power sensor for boost converter with 14.1% gain error and 9.4% offset error., , , and . LASCAS, page 1-4. IEEE, (2018)Development of a Wireless Integrated Toxic and Explosive MEMS Based Gas Sensor., , , and . VLSI Design, page 721-724. IEEE Computer Society, (2006)Spur reducing architecture of frequency synthesiser using switched capacitors., , and . IET Circuits, Devices & Systems, 8 (4): 237-245 (2014)Prediction of reference spur in frequency synthesisers., , and . IET Circuits, Devices & Systems, 9 (2): 131-139 (2015)Implementation of CMOS Low-power Integer-N Frequency Synthesizer for SOC Design., and . JCP, 3 (4): 31-38 (2008)