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Disambiguation of "Seznec, André"

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Controlling and sequencing a heavily pipelined floating-point operator.

, and . MICRO, page 111-114. ACM/IEEE, (1992)

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André Jaquemod University of Stuttgart

Univ. -Prof. Dr. rer. nat. André Thess University of Stuttgart

Dr. -Ing. André Buchau University of Stuttgart

André Weiß University of Stuttgart

André Loescher University of Stuttgart

 

Other publications of authors with the same name

Register sharing for equality prediction., , and . MICRO, page 1-12. IEEE Computer Society, (2016)Dictionary sharing: An efficient cache compression scheme for compressed caches., and . MICRO, page 1-12. IEEE Computer Society, (2016)Prediction-based superpage-friendly TLB designs., , , and . HPCA, page 210-222. IEEE Computer Society, (2015)EOLE: Paving the way for an effective implementation of value prediction., and . ISCA, page 481-492. IEEE Computer Society, (2014)Hardware/Software Helper Thread Prefetching on Heterogeneous Many Cores., , and . SBAC-PAD, page 214-221. IEEE Computer Society, (2014)Optimizing Memory Throughput In a Tightly Coupled Multiprocessor., and . ICPP, page 344-346. Pennsylvania State University Press, (1987)Selecting benchmark combinations for the evaluation of multicore throughput., , and . ISPASS, page 173-182. IEEE Computer Society, (2013)Data Synchronized Pipeline Architecture: Pipelining in Multiprocessor Environments., and . ICPP, page 487-494. IEEE Computer Society Press, (1986)Fetch Gating Control through Speculative Instruction Window Weighting., and . Trans. HiPEAC, (2009)Topic 08+13: Instruction-Level Parallelism and Computer Architecture., , , , , , , and . Euro-Par, volume 2150 of Lecture Notes in Computer Science, page 385. Springer, (2001)