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A correctness criterion for asynchronous circuit validation and optimization.

, , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 13 (11): 1309-1318 (1994)

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On the definition of sequential consistency., and . Inf. Process. Lett., 96 (6): 193-196 (2005)UMM: an operational memory model specification framework with integrated model checking capability., , and . Concurrency - Practice and Experience, 17 (5-6): 465-487 (2005)Asynchronous Microengines for Efficient High-level Control., and . ARVLSI, page 201-218. IEEE Computer Society, (1997)Hierarchical cache coherence protocol verification one level at a time through assume guarantee., , , , and . HLDVT, page 107-114. IEEE Computer Society, (2007)towards A formal Model of Shared Memory Consistency for Intel ItaniumTM., and . ICCD, page 515-518. IEEE Computer Society, (2001)Nemos: A Framework for Axiomatic and Executable Specifications of Memory Consistency Models., , , and . IPDPS, IEEE Computer Society, (2004)VLSI asynchronous systems: specification and synthesis., and . Microprocessors and Microsystems - Embedded Hardware Design, 16 (10): 517-527 (1992)Towards Resiliency Evaluation of Vector Programs., , and . IPDPS Workshops, page 1319-1328. IEEE Computer Society, (2016)Synthesizing Synchronous Digital VLSI Controllers Using Petri Nets.. PNPM, page 94-103. IEEE Computer Society, (1987)A correctness criterion for asynchronous circuit validation and optimization., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 13 (11): 1309-1318 (1994)