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Disambiguation of "Ammendola, Roberto"

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NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs.

, , , , , , , , , , , , and . CoRR, (2013)

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Other publications of authors with the same name

Design and implementation of a modular, low latency, fault-aware, FPGA-based network interface., , , , , , , , , and . ReConFig, page 1-6. IEEE, (2013)APENet: a high speed, low latency 3D interconnect network., , , , , , , and . CLUSTER, page 481. IEEE Computer Society, (2004)ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces., , , , , , , , , and 2 other author(s). Future Generation Comp. Syst., (2015)Real-Time Cortical Simulations: Energy and Interconnect Scaling on Distributed Systems., , , , , , , , , and 4 other author(s). PDP, page 283-290. IEEE, (2019)Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodity cluster., , , , , , , , , and . CoRR, (2013)EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes., , , , , , , , , and 5 other author(s). CoRR, (2014)The Brain on Low Power Architectures - Efficient Simulation of Cortical Slow Waves and Asynchronous States., , , , , , , , , and 3 other author(s). CoRR, (2018)Real-time cortical simulations: energy and interconnect scaling on distributed systems., , , , , , , , , and 4 other author(s). CoRR, (2018)Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms., , , , , , , , , and 11 other author(s). Journal of Systems Architecture - Embedded Systems Design, (2016)A hierarchical watchdog mechanism for systemic fault awareness on distributed systems., , , , , , , , , and . Future Generation Comp. Syst., (2015)