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Disambiguation of "Monchiero, Matteo"

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Power/performance hardware optimization for synchronization intensive applications in MPSoCs.

, , , and . DATE, page 606-611. European Design and Automation Association, Leuven, Belgium, (2006)

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Matteo Schilirò University of Stuttgart

Matteo Bortoletto University of Stuttgart

Matteo Paltenghi University of Stuttgart

 

Other publications of authors with the same name

Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip., , , , and . DATE, page 804-805. IEEE Computer Society, (2005)Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors., , , , , and . ACM Great Lakes Symposium on VLSI, page 440-443. ACM, (2004)Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors., , , and . ICSAMOS, page 144-151. IEEE, (2006)Using Coherence Information and Decay Techniques to Optimize L2 Cache Leakage in CMPs., , and . ICPP, page 1-8. IEEE Computer Society, (2009)A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies., , , , and . ISCA, page 51-62. IEEE Computer Society, (2008)A multiprocessor self-reconfigurable JPEG2000 encoder., , , , , , and . IPDPS, page 1-8. IEEE, (2009)The Combined Perceptron Branch Predictor., and . Euro-Par, volume 3648 of Lecture Notes in Computer Science, page 487-496. Springer, (2005)Corona: System Implications of Emerging Nanophotonic Technology., , , , , , , , , and . ISCA, page 153-164. IEEE Computer Society, (2008)An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb., , , , and . ISVLSI, page 449-450. IEEE Computer Society, (2007)Power Management of Datacenter Workloads Using Per-Core Power Gating., , , , and . IEEE Comput. Archit. Lett., 8 (2): 48-51 (2009)