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Disambiguation of "Spallek, Rainer G."

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The portable open-source IP core and utility library PoC.

, , , and . ReConFig, page 1-6. IEEE, (2016)

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G. Daiß

G. Wagner

apl. Prof. Dr. Rainer Bäuerle University of Stuttgart

Robin Rainer Herkert University of Stuttgart

Replication Code for: Greedy Kernel Methods for Approximating Breakthrough Curves for Reactive Flow from 3D Porous Geometry Data. Software, (2024)Related to: R. Herkert, P. Buchfink, T. Wenzel, B. Haasdonk, P. Toktaliev, O. Iliev (2024), "Greedy Kernel Methods for Approximating Breakthrough Curves for Reactive Flow from 3D Porous Geometry Data". arXiv: 2405.19170.

Rainer Goutrié University of Stuttgart

 

Other publications of authors with the same name

Superblock compilation and other optimization techniques for a Java-based DPT machine emulator., and . VEE, page 33-40. ACM, (2013)RECAST - Design Space Exploration for Dynamic Reconfigurable Embedded Computing., , and . ESA/VLSI, page 130-135. CSREA Press, (2004)Generating the trace qualification configuration for MCDS from a high level language., and . DATE, page 1560-1563. IEEE, (2009)Formal Verification of a Reconfigurable Microprocessor., , , and . FPL, volume 1896 of Lecture Notes in Computer Science, page 781-784. Springer, (2000)Architecture Template and Design Flow to Support Applications Parallelism on Reconfigurable Platforms., and . FPL, volume 2778 of Lecture Notes in Computer Science, page 1119-1122. Springer, (2003)A Compiler-Oriented Architecture Description for Reconfigurable Systems., and . ARC, volume 3985 of Lecture Notes in Computer Science, page 443-448. Springer, (2006)Modellierung anwendungsspezifischer Hardware und deren Einbettung in die DBT-basierte Prozessor-Verhaltenssimulation., and . GI-Jahrestagung, volume P-275 of LNI, page 493-501. GI, (2017)Research and implementation of efficient parallel processing of big data at TELBE user facility., , , , , and . SummerSim, page 56:1-56:6. ACM, (2019)Bewertung von modernen Rechnerarchitekturen hinsichtlich numerischer Simulationen auf heterogenen Plattformen., and . MMB (Kurzbeiträge), page 51-58. TU Bergakademie Freiberg, (1997)Analysis of a Fully-Scalable Digital Fractional Clock Divider., and . ASAP, page 173-177. IEEE Computer Society, (2006)