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Design of a Circuit-Switched Highly Fault-Tolerant k-ary n-cube.

, and . ICPP, page 342-345. IEEE Computer Society, (1997)

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A Highly Fault-Tolerant Circuit-Switched Hypercube., , and . Euro-PDS, page 9-14. IASTED/ACTA Press, (1997)Coordinating Human Operators and Computer Agents for Recovery-Oriented Computing., , and . IRI, page 351-356. IEEE Systems, Man, and Cybernetics Society, (2004)Reconfiguration in a Circuit-Switched k-ary Tree Multiprocessor., and . PDPTA, page 1658-1667. CSREA Press, (1997)Optimal Subcube Allocation in a Circuit-Switched Faulty Hypercube., and . Parallel Processing Letters, 8 (1): 77-81 (1998)Experimental Analysis of Batteries Under Continuous and Intermittent Operations., , , , and . ESA/VLSI, page 18-24. CSREA Press, (2004)Switching Activity Minimization in Combinational Logic Design., , , , and . ESA/VLSI, page 47-53. CSREA Press, (2004)Enhanced Cluster k-Ary n-Cube, A Fault-Tolerant Multiprocessor., and . IEEE Trans. Computers, 52 (11): 1443-1453 (2003)An Augmented k-ary Tree Multiprocessor with Real-Time Fault-Tolerant Capability., and . The Journal of Supercomputing, 27 (1): 5-17 (2004)Two-Stage Fault-Tolerant k-ary Tree Multiprocessors., and . PDPTA, CSREA Press, (2000)Coarse-Grained DRAM Power Management., , and . Embedded Systems and Applications, page 248-254. CSREA Press, (2003)