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Initialization mechanism in Kohonen neural network implemented in CMOS technology., and . ESANN, page 337-342. (2008)Efficient methods of initializing neuron weights in self-organizing networks implemented in hardware., , , and . Applied Mathematics and Computation, (2018)A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology., , , and . MIXDES, page 151-156. IEEE, (2019)Trade-offs and Other Challenges in CMOS Implementation of Parallel FIR Filters., and . MIXDES, page 265-270. IEEE, (2019)An optimized algorithm for recognition of complex patterns based on artificial neural network., , , and . MIXDES, page 580-585. IEEE, (2013)Hardware implementation of the particle swarm optimization algorithm., , and . MIXDES, page 521-526. IEEE, (2017)A 10-phases programmable clock generator for the application in control of SAR ADC realized in the CMOS 130 nm technology., and . MIXDES, page 115-118. IEEE, (2016)Power efficient asynchronous multiplexer for X-ray sensors in medical imaging analog front-end electronics., , and . Microelectronics Journal, 42 (1): 33-42 (2011)lukasiewicz fuzzy logic networks and their ultra low power hardware implementation., and . Neurocomputing, 73 (7-9): 1222-1234 (2010)An Examination of the Effect of Feature Size Scaling on Effective Power Consumption in Analog to Digital Converters., , , , and . SiPS, page 194-199. IEEE, (2006)