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Disambiguation of "Pena-Perez, Aldo"

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An incremental ADC sensor interface with input switch-Less integrator featuring 220-nVrms resolution with ±30-mV input range.

, , , , and . ESSCIRC, page 389-392. IEEE, (2012)

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Hiraida Rossy Perez Palomares University of Stuttgart

Marta Gil Pérez University of Stuttgart

Univ. -Prof. Dr. -Ing. Zamira Angelica Daw Perez University of Stuttgart

 

Other publications of authors with the same name

A 84dB SNDR 100kHz bandwidth low-power single op-amp third-order ΔΣ modulator consuming 140μW., , and . ISSCC, page 478-480. IEEE, (2011)Fractional Frequency Synthesizers With Low Order Time-Variant Digital Sigma-Delta Modulator., , and . IEEE Trans. on Circuits and Systems, 59-I (5): 969-978 (2012)27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI., , , , , , and . ISSCC, page 456-457. IEEE, (2017)Double-sampling analog-look-ahead second order ΣΔ modulator with reduced dynamics., , and . ISCAS, page 2422-2425. IEEE, (2010)Continuos Time ΣΔ modulator with efficient gain compensated integrators., , and . Microelectronics Journal, (2016)A 88-dB DR, 84-dB SNDR Very Low-Power Single Op-Amp Third-Order Σ Δ Modulator., , and . J. Solid-State Circuits, 47 (9): 2107-2118 (2012)Performance enhanced op-amp for 65nm CMOS technologies and below., and . ISCAS, page 201-204. IEEE, (2012)A two op-amps third-order ΣΔ modulator with complex conjugate NTF zeros., , , and . ICECS, page 683-686. IEEE, (2010)Use of time variant digital sigma-delta for fractional frequency synthesizers., , and . ISCAS, page 169-172. IEEE, (2011)Slew-rate and Gain Enhancement in Two Stage Operational Amplifiers., , , and . ISCAS, page 2485-2488. IEEE, (2009)