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An Approach for Reducing Leakage Current Variation due to Manufacturing Variability.

T. Sakata, T. Okumura, A. Kurokawa, H. Nakashima, H. Masuda, T. Sato, M. Hashimoto, K. Hachiya, K. Furukawa, M. Tanaka, H. Takafuji, and T. Kanamoto. IEICE Transactions, 92-A (12): 3016-3023 (2009)

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Comprehensive Matching Characterization of Analog CMOS Circuits.H. Masuda, T. Kida, and S. ichi Ohkawa. IEICE Transactions, 92-A (4): 966-975 (2009)A New Design-Centering Methodology for VLSI Device Development.Y. Aoki, H. Masuda, S. Shimada, and S. Sato. IEEE Trans. on CAD of Integrated Circuits and Systems, 6 (3): 452-461 (1987)Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations.T. Okumura, A. Kurokawa, H. Masuda, T. Kanamoto, M. Hashimoto, H. Takafuji, H. Nakashima, N. Ono, T. Sakata, and T. Sato. IEICE Transactions, 92-A (4): 990-997 (2009)Impact of Self-Heating in Wire Interconnection on Timing.T. Kanamoto, T. Okumura, K. Furukawa, H. Takafuji, A. Kurokawa, K. Hachiya, T. Sakata, M. Tanaka, H. Nakashima, H. Masuda and 2 other author(s). IEICE Transactions, 93-C (3): 388-392 (2010)Approach for physical design in sub-100 nm era.H. Masuda, S. ichi Ohkawa, and M. Aoki. ISCAS (6), page 5934-5937. IEEE, (2005)A submicrometer MOS transistor I-V model for circuit simulation.H. Masuda, J. Mano, R. Ikematsu, H. Sugihara, and Y. Aoki. IEEE Trans. on CAD of Integrated Circuits and Systems, 10 (2): 161-170 (1991)Large-scale linear circuit simulation with an inversed inductance matrix.C. Mizuta, J. Iwai, K. Machida, T. Kage, and H. Masuda. ASP-DAC, page 511-516. IEEE Computer Society, (2004)TCAD/DA for MPU and ASIC Development.H. Masuda, K. Tsuneno, H. Sato, and K. Mori. ASP-DAC, page 129-134. IEEE, (1998)A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills.A. Kurokawa, T. Kanamoto, A. Kasebe, Y. Inoue, and H. Masuda. IEICE Transactions, 88-A (11): 3180-3187 (2005)Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills.A. Kurokawa, T. Kanamoto, T. Ibe, A. Kasebe, W. Chang, T. Kage, Y. Inoue, and H. Masuda. IEICE Transactions, 88-A (12): 3471-3478 (2005)

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An Approach for Reducing Leakage Current Variation due to Manufacturing Variability.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An Approach for Reducing Leakage Current Variation due to Manufacturing Variability.

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An Approach for Reducing Leakage Current Variation due to Manufacturing Variability.