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High-Level Reliability Evaluation of Reconfiguration-Based Fault Tolerance Techniques.

, , , , , and . IPDPS Workshops, page 202-205. IEEE Computer Society, (2018)

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A software generator for multi-transputer-based real-time applications., and . Microprocessing and Microprogramming, 35 (1-5): 529-536 (1992)Transaction level modeling of an adaptive multi-standard and multi-application radio communication system., , , and . FDL, page 1-6. IEEE, (2009)A Graphical Tool for System-Level Modeling and Simulation with SystemC., , and . FDL, page 583-593. ECSI, (2003)A framework for the design of reconfigurable fault tolerant architectures., , , and . DASIP, page 324-331. IEEE, (2011)A Programmable Multi-Language Generator for CoDesign., , , and . DATE, page 927-928. IEEE Computer Society, (1998)A state-based modeling approach for fast performance evaluation of embedded system architectures., , and . International Symposium on Rapid System Prototyping, page 156-162. IEEE, (2011)Performance Monitoring and Assessment of Embedded HW/SW Systems., and . Design Autom. for Emb. Sys., 3 (1): 5-22 (1998)A Case Study of Simulation and Performance Evaluationof a SDR Baseband Architecture., , and . Signal Processing Systems, 73 (3): 267-279 (2013)Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol., , , and . DSD, page 438-441. IEEE Computer Society, (2011)Performance evaluation of an automotive distributed architecture based on HPAV communication protocol using a transaction level modeling approach., , , and . DASIP, page 20-26. IEEE, (2011)