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Memory Management in Concurrent Algorithms.. CAV, volume 6174 of Lecture Notes in Computer Science, page 23. Springer, (2010)Compiler and runtime techniques for software transactional memory optimization., , , , , , , , , and 5 other author(s). Concurrency and Computation: Practice and Experience, 21 (1): 7-23 (2009)High-throughout coherence control and hardware messaging in Everest., , , and . IBM Journal of Research and Development, 45 (2): 229-244 (2001)High performance dynamic lock-free hash tables and list-based sets.. SPAA, page 73-82. ACM, (2002)Quantitative comparison of hardware transactional memory for Blue Gene/Q, zEnterprise EC12, Intel Core, and POWER8., , , , and . ISCA, page 144-157. ACM, (2015)A theory of memory models., , , and . PPOPP, page 161-172. ACM, (2007)Idempotent work stealing., , and . PPOPP, page 45-54. ACM, (2009)Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms., and . PODC, page 267-275. ACM, (1996)Brief announcement: completing the lock-free dynamic cycle.. PODC, page 372. ACM, (2004)Coherence Controller Architectures for Scalable Shared-Memory Multiprocessors., , and . IEEE Trans. Computers, 48 (2): 245-255 (1999)