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An industrially effective environment for formal hardware verification.

C. Seger, R. Jones, J. O'Leary, T. Melham, M. Aagaard, C. Barrett, and D. Syme. IEEE Trans. on CAD of Integrated Circuits and Systems, 24 (9): 1381-1405 (2005)

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Dr. Andrew Clark University of Stuttgart

Charles Clark University of Stuttgart

Tim W{\"{u}}rtele

Tim W{\"{u}}rtele

Kent W. Stewart

Other publications of authors with the same name

CVC4 at the SMT Competition 2018.C. Barrett, H. Barbosa, M. Brain, D. Ibeling, T. King, P. Meng, A. Niemetz, A. Nötzli, M. Preiner, A. Reynolds and 1 other author(s). CoRR, (2018)Constraint solving for finite model finding in SMT solvers.A. Reynolds, C. Tinelli, and C. Barrett. TPLP, 17 (4): 516-558 (2017)cvc4sy: Smart and Fast Term Enumeration for Syntax-Guided Synthesis.A. Reynolds, H. Barbosa, A. Nötzli, C. Barrett, and C. Tinelli. CAV (2), volume 11562 of Lecture Notes in Computer Science, page 74-83. Springer, (2019)Scaling Up DPLL(T) String Solvers Using Context-Dependent Simplification.A. Reynolds, M. Woo, C. Barrett, D. Brumley, T. Liang, and C. Tinelli. CAV (2), volume 10427 of Lecture Notes in Computer Science, page 453-474. Springer, (2017)A DPLL(T) Theory Solver for a Theory of Strings and Regular Expressions.T. Liang, A. Reynolds, C. Tinelli, C. Barrett, and M. Deters. CAV, volume 8559 of Lecture Notes in Computer Science, page 646-662. Springer, (2014)E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods.E. Singh, C. Barrett, and S. Mitra. CAV (2), volume 10427 of Lecture Notes in Computer Science, page 104-125. Springer, (2017)Fine Grained SMT Proofs for the Theory of Fixed-Width Bit-Vectors.L. Hadarean, C. Barrett, A. Reynolds, C. Tinelli, and M. Deters. LPAR, volume 9450 of Lecture Notes in Computer Science, page 340-355. Springer, (2015)Towards Proving the Adversarial Robustness of Deep Neural Networks.G. Katz, C. Barrett, D. Dill, K. Julian, and M. Kochenderfer. FVAV@iFM, volume 257 of EPTCS, page 19-26. (2017)Lazy proofs for DPLL(T)-based SMT solvers.G. Katz, C. Barrett, C. Tinelli, A. Reynolds, and L. Hadarean. FMCAD, page 93-100. IEEE, (2016)Satisfiability Modulo Theories.C. Barrett, and C. Tinelli. Handbook of Model Checking, Springer, (2018)