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Disambiguation of "Llabería, José María"

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A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units.

, , , , and . VLSI Signal Processing, 4 (1): 7-25 (1992)

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Jithin Jose University of Stuttgart

Basil Jose University of Stuttgart

Claudia Marianowski University of Stuttgart

apl. Prof. Dr. Maria Fyta University of Stuttgart

Maria Papadimitraki University of Stuttgart

 

Other publications of authors with the same name

Increasing the Effective Bandwidth of Complex Memory Systems in Multivector Processors., and . SC, page 26. IEEE Computer Society, (1996)Counteracting Bank Misprediction in Sliced First-Level Caches., , , and . Euro-Par, volume 2790 of Lecture Notes in Computer Science, page 586-596. Springer, (2003)An Enhancement for a Scheduling Logic Pipelined over two Cycles ., , , and . ICCD, page 203-209. IEEE, (2006)Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors., , , , , and . HPCA, page 191-202. IEEE Computer Society, (2003)Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors., , , , , and . TACO, 2 (3): 247-279 (2005)Store Buffer Design for Multibanked Data Caches., , , and . IEEE Trans. Computers, 58 (10): 1307-1320 (2009)Loop bounds computation for multilevel tiling., , and . PDP, page 445-452. IEEE Computer Society, (1998)Contents Management in First-Level Multibanked Data Caches., , , and . Euro-Par, volume 3149 of Lecture Notes in Computer Science, page 516-524. Springer, (2004)Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation., , , , , and . IEEE PACT, page 170-181. IEEE Computer Society, (2003)Exploiting reuse locality on inclusive shared last-level caches., , , and . TACO, 9 (4): 38:1-38:19 (2013)