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Disambiguation of "Becher, Andreas"

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Design and Evaluation of a Tunable PUF Architecture for FPGAs.

, , , , and . ACM Trans. Reconfigurable Technol. Syst., 15 (1): 7:1-7:27 (2022)

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Michael Becher University of Stuttgart

Univ. -Prof. Dr. Andreas Bulling University of Stuttgart

InvisibleEye. Dataset, (2024)Related to: Tonsen, Marc, Julian Steil, Yusuke Sugano, Andreas Bulling. 2017. InvisibleEye: Mobile Eye Tracking Using Multiple Low-Resolution Cameras and Learning-Based Gaze Estimation. In Proceedings of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies (IMWUT) vol. 1, iss. 3, article no. 106. doi: 10.1145/3130971.

Prof. Dr. Andreas Hotho

Ontology-based Text Document Clustering., , and . KI, 16 (4): 48-54 (2002)
Ontology-based Text Document Clustering., , and . KI, 16 (4): 48-54 (2002)Clustern mit Hintergrundwissen.. Karlsruhe Institute of Technology, (2004)

Junior-Prof. Dr.-Ing. Andreas Pott

Andreas Kaufmann

 

Other publications of authors with the same name

Reliability of space-grade vs. COTS SRAM-based FPGA in N-modular redundancy., , , , , , and . AHS, page 1-8. IEEE, (2015)FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs., , , , and . FPT, page 213-216. IEEE, (2016)ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing., , , and . BTW (Workshops), volume P-290 of LNI, page 51-70. Gesellschaft für Informatik, Bonn, (2019)Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics., , , , and . SCOPES, page 89-92. ACM, (2017)Optimistic regular expression matching on FPGAs for near-data processing., , and . DaMoN, page 4:1-4:3. ACM, (2018)Design and Evaluation of a Tunable PUF Architecture for FPGAs., , , , and . ACM Trans. Reconfigurable Technol. Syst., 15 (1): 7:1-7:27 (2022)Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration., , , and . FPL, page 1-8. IEEE, (2014)A co-design approach for accelerated SQL query processing via FPGA-based data filtering., , , and . FPT, page 192-195. IEEE, (2015)Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs., , , , , , and . ReConFig, page 1-8. IEEE, (2018)In situ Statistics Generation within partially reconfigurable Hardware Accelerators for Query Processing., and . DaMoN, page 20:1-20:3. ACM, (2019)