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Trace Driven Simulation using Sampled Traces.

, and . HICSS (1), page 211-220. IEEE Computer Society, (1994)

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Application of Saluja-Karpovsky Compactors to Test Responses with Many Unknowns., , and . VTS, page 107-112. IEEE Computer Society, (2003)Bounding Circuit Delay by Testing a Very Small Subset of Paths., and . VTS, page 333-342. IEEE Computer Society, (2000)Sequential circuit test generation using dynamic state traversal., , and . ED&TC, page 22-28. IEEE Computer Society, (1997)Application of Simple Genetic Algorithms to Sequential Circuit Test Generation., , , and . EDAC-ETC-EUROASIC, page 40-45. IEEE Computer Society, (1994)Multiple-Fault Detection in Iterative Logic Arrays., and . ITC, page 493-499. IEEE Computer Society, (1985)Logic BIST with Scan Chain Segmentation., , , and . ITC, page 57-66. IEEE Computer Society, (2004)Partial Scan beyond Cycle Cutting., , and . FTCS, page 320-328. IEEE Computer Society, (1997)Testing of critical paths for delay faults., and . ITC, page 634-641. IEEE Computer Society, (2001)Enhanced delay defect coverage with path-segments., and . ITC, page 385-392. IEEE Computer Society, (2000)A new architectural-level fault simulation using propagation prediction of grouped fault-effects., and . ICCD, page 628-635. IEEE Computer Society, (1995)