PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Jr., Mauricio Breternitz"

Author of the publication

copydeleteadd this publication to your clipboard
Continuous Trip Count Profiling for Loop Optimizations in Two-Phase Dynamic Binary Translato.

, , and . Interaction between Compilers and Computer Architectures, page 3-12. IEEE Computer Society, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Jr., Mauricio Breternitz
add a person with the name Jr., Mauricio Breternitz
 

Other publications of authors with the same name

An Optimal Asynchronous Scheduling Algorithm for Software Cache Consistence., , , and . HICSS (2), page 502-511. IEEE Computer Society, (1994)Continuous Trip Count Profiling for Loop Optimizations in Two-Phase Dynamic Binary Translato., , and . Interaction between Compilers and Computer Architectures, page 3-12. IEEE Computer Society, (2004)Organization of array data for concurrent memory access., and . MICRO, page 97-99. ACM/IEEE, (1988)Enhanced code density of embedded CISC processors with echo technology., , , , and . CODES+ISSS, page 160-165. ACM, (2005)StarDBT: An Efficient Multi-platform Dynamic Binary Translation System., , , , , , and . Asia-Pacific Computer Systems Architecture Conference, volume 4697 of Lecture Notes in Computer Science, page 4-15. Springer, (2007)Microcode Compression Using Structured-Constrained Clustering., , , and . International Journal of Parallel Programming, 42 (1): 140-164 (2014)The Multi-Lane Capsule Network (MLCN)., , and . CoRR, (2019)Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU., , and . IEEE PACT, page 135-145. IEEE Computer Society, (2003)Implementation Optimization Techniques for Architecture Synthesis of Application-Specific Processors., and . MICRO, page 114-123. ACM/IEEE, (1991)LAR-CC: Large atomic regions with conditional commits., , , and . CGO, page 54-63. IEEE Computer Society, (2011)