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A DVFS based HEVC decoder for energy-efficient software implementation on embedded processors.

, , , , and . ICME, page 1-6. IEEE Computer Society, (2015)

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Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal Processing., , , , , and . Signal Processing Systems, 83 (3): 309-328 (2016)Power-aware HEVC decoding with tunable image quality., , , , and . SiPS, page 38-43. IEEE, (2014)Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing., , , , , , , and . Embedded Systems Letters, 9 (3): 65-68 (2017)Convex Energy Optimization of Streaming Applications for MPSoCs., , , , and . ICASSP, page 1557-1561. IEEE, (2019)Delays and states in dataflow models of computation., , , , , and . SAMOS, page 47-54. ACM, (2018)Why TanH is a Hardware Friendly Activation Function for CNNs., , and . ICDSC, page 199-201. ACM, (2017)Hardware Acceleration of the Tracking Learning Detection (TLD) Algorithm on FPGA., , , , and . ICDSC, page 180-185. ACM, (2017)Cross-layer design of reconfigurable cyber-physical systems., , , , , , , , , and 2 other author(s). DATE, page 740-745. IEEE, (2017)Building a RTOS for MPSoC dataflow programming., , , , and . SoC, page 143-146. IEEE, (2011)Physical Layer Multi-Core Prototyping - A Dataflow-Based Approach for LTE eNodeB, , , and . Lecture Notes in Electrical Engineering Springer, (2013)