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Ultra-low power electronics with Si/Ge tunnel FET., , and . DATE, page 1-6. European Design and Automation Association, (2014)Low Power Speaker Identification using Look Up-free Gaussian Mixture Model in CMOS., , , , and . COOL CHIPS, page 1-3. IEEE, (2019)Gate/source-overlapped heterojunction Tunnel FET-based LAMSTAR neural network and its Application to EEG Signal Classification., and . IJCNN, page 955-962. IEEE, (2016)An Intrinsic and Database-Free Authentication by Exploiting Process Variation in Back-End Capacitors., , and . IEEE Trans. VLSI Syst., 27 (6): 1253-1261 (2019)Straintronic magneto-tunneling-junction based ternary content addressable memory., , , , and . CoRR, (2016)Supported-BinaryNet: Bitcell Array-based Weight Supports for Dynamic Accuracy-Latency Trade-offs in SRAM-based Binarized Neural Network., , , and . CoRR, (2019)Self-Organizing Maps-Based Flexible and High-Speed Packet Classification in Software Defined Networking., , , and . VLSI Design, page 545-546. IEEE, (2019)A Comparative Study of Si/Ge and GaSb/InAs Tunnel FET-Based Cellular Neural Network., and . ISVLSI, page 685-690. IEEE Computer Society, (2016)Exploration of Si/Ge Tunnel FET Bit Cells for Ultra-low Power Embedded Memory., , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (2): 185-197 (2016)Switching voltage, dynamic power dissipation and on-to-off conductance ratio of a spin field effect transistor., , and . IET Circuits, Devices & Systems, 1 (6): 395-400 (2007)