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Understanding the performance of stencil computations on Intel's Xeon Phi.

, , , , , and . CLUSTER, page 1-5. IEEE Computer Society, (2013)

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A Static Binary Instrumentation Threading Model for Fast Memory Trace Collection., , , , , and . SC Companion, page 741-745. IEEE Computer Society, (2012)Characterizing the Performance-Energy Tradeoff of Small ARM Cores in HPC Computation., , , , , , and . Euro-Par, volume 8632 of Lecture Notes in Computer Science, page 124-137. Springer, (2014)How Well Can Simple Metrics Represent the Performance of HPC Applications?, , , , and . SC, page 48. IEEE Computer Society, (2005)Building Blocks for a System-Wide Power and Thermal Management Framework., , , , and . ICPADS, page 700-707. IEEE Computer Society, (2015)Characterization and bottleneck analysis of a 64-bit ARMv8 platform., , , , , , and . ISPASS, page 36-45. IEEE Computer Society, (2016)Understanding the performance of stencil computations on Intel's Xeon Phi., , , , , and . CLUSTER, page 1-5. IEEE Computer Society, (2013)Performance Prediction and Ranking of Supercomputers., , , , , and . Advances in Computers, (2008)VecMeter: Measuring Vectorization on the Xeon Phi., , , , and . CLUSTER, page 478-481. IEEE Computer Society, (2015)Making the Most of SMT in HPC: System- and Application-Level Perspectives., , , , , , and . TACO, 11 (4): 59:1-59:26 (2014)DARPA's HPCS Program- History, Models, Tools, Languages., , , , , , , , , and 7 other author(s). Advances in Computers, (2008)