Author of the publication

Design Space Exploration Supporting Run-Time Resource Management.

, , , , , , and . Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, Springer, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

DeSpErate: Speeding-up design space exploration by using predictive simulation scheduling., , , and . DATE, page 1-4. European Design and Automation Association, (2014)Power Estimation of System-Level Buses for Microprocessor-Based Architectures: A Case Study., , and . ICCD, page 131-. IEEE Computer Society, (1999)Systematic AUED Codes for Self-Checking Architectures., , and . DFT, page 183-191. IEEE Computer Society, (1998)Power estimation of embedded systems: a hardware/software codesign approach., , , and . IEEE Trans. VLSI Syst., 6 (2): 266-275 (1998)A Configurable Monitoring Infrastructure for NoC-Based Architectures., , and . IEEE Trans. VLSI Syst., 22 (11): 2436-2440 (2014)Automatic generation of error control codes for computer applications., , and . IEEE Trans. VLSI Syst., 6 (3): 502-506 (1998)Secure Memory Accesses on Networks-on-Chip., , , , and . IEEE Trans. Computers, 57 (9): 1216-1229 (2008)MiCOMP: Mitigating the Compiler Phase-Ordering Problem Using Optimization Sub-Sequences and Machine Learning., , , , , and . TACO, 14 (3): 29:1-29:28 (2017)COBAYN: Compiler Autotuning Framework Using Bayesian Networks., , , , , and . TACO, 13 (2): 21:1-21:25 (2016)ReSPIR: A Response Surface-Based Pareto Iterative Refinement for Application-Specific Design Space Exploration., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (12): 1816-1829 (2009)