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Recent Developments in Performance Driven Steiner Routing: An Overview.

, , and . Great Lakes Symposium on VLSI, page 137-142. IEEE Computer Society, (1996)

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Techniques to Reduce the Inherent Limitations of Fully Digit On-Line Arithmetic.. IEEE Trans. Computers, 32 (4): 406-411 (1983)Fully Digit On-Line Networks., and . IEEE Trans. Computers, 32 (4): 402-406 (1983)Being Stingy with Multipliers., and . IEEE Trans. Computers, 39 (6): 809-818 (1990)A VLSI chip for the winograd/Prime factor algorithm to compute the discrete Fourier transform., and . IEEE Trans. Acoustics, Speech, and Signal Processing, 34 (4): 979-989 (1986)A new blocked IIR algorithm., , , and . ICASSP (3), page 113-116. IEEE Computer Society, (1993)Design tradeoffs in high speed multipliers and FIR filters., , and . VLSI Design, page 29-32. IEEE Computer Society, (1996)A Simulation Methodology for Software Energy Evaluation., , and . VLSI Design, page 509-510. IEEE Computer Society, (1997)FPGA-based synthesis of FSMs through decomposition., , and . Great Lakes Symposium on VLSI, page 97-100. IEEE, (1994)Optimal Algorithms for Mesh-Connected Parallel Processors with Serial Memories., and . ICPP, page 812-818. IEEE Computer Society Press, (1986)Compound algorithms for digit online arithmetic.. IEEE Symposium on Computer Arithmetic, page 64-71. IEEE Computer Society, (1981)