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Megatrends and EDA 2017., , , , , , and . DAC, page 21-22. IEEE, (2007)Bus Encoding to Prevent Crosstalk Delay., and . ICCAD, page 57-. IEEE Computer Society, (2001)Miller Factor for Gate-Level Coupling Delay Calculation., , and . ICCAD, page 68-74. IEEE Computer Society, (2000)Challenges in code generation for embedded processors., , , , , , , and . Code Generation for Embedded Processors, page 48-64. Kluwer, (1994)Coverage Metrics for Functional Validation of Hardware Designs., and . IEEE Design & Test of Computers, 18 (4): 36-45 (2001)Technology Mapping., and . Encyclopedia of Algorithms, (2016)A unified approach to the synthesis of fully testable sequential machines., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 10 (1): 39-50 (1991)Is redundancy necessary to reduce delay?, , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 10 (4): 427-435 (1991)Code density optimization for embedded DSP processors using data compression techniques., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 17 (7): 601-608 (1998)Addendum to "Synthesis of robust delay-fault testable circuits: Theory"., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 15 (4): 445-446 (1996)