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Disambiguation of "Qian, Zhiliang"

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FSNoC: A Flit-Level Speedup Scheme for Network on-Chips Using Self-Reconfigurable Bidirectional Channels.

, , and . IEEE Trans. VLSI Syst., 23 (9): 1854-1867 (2015)

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Qian Song University of Stuttgart

Electrocatalytic proton reduction: Metal based fused diporphyrins with proton relays for efficient catalysis, , , , , , , , and . Dataset, (2024)Related to: Chandra, S., Singha Hazari, A., Song, Q., Hunger, D., Neuman, N. I., van Slageren, J., Klemm, E. & Sarkar, B. (2023). Remarkable Enhancement of Catalytic Activity of Cu-Complexes in the Electrochemical Hydrogen Evolution Reaction by Using Triply Fused Porphyrin. ChemSusChem 16, e202201146. doi: 10.1002/cssc.202201146.

Qian Zhou University of Stuttgart

Qian Du University of Stuttgart

 

Other publications of authors with the same name

A thermal-aware application specific routing algorithm for Network-on-Chip design., and . ASP-DAC, page 449-454. IEEE, (2011)A fault-tolerant network-on-chip design using dynamic reconfiguration of partial-faulty routing resources., , and . VLSI-SoC, page 192-195. IEEE, (2011)M3A: Model, MetaModel, and Anomaly Detection in Web Searches., , , , , and . CoRR, (2016)A traffic-aware adaptive routing algorithm on a highly reconfigurable network-on-chip architecture., , , , and . CODES+ISSS, page 161-170. ACM, (2012)An efficient Network-on-Chip (NoC) based multicore platform for hierarchical parallel genetic algorithms., , , , , and . NOCS, page 17-24. IEEE, (2014)A comprehensive and accurate latency model for Network-on-Chip performance analysis., , , , , and . ASP-DAC, page 323-328. IEEE, (2014)A feature exploration methodology for learning based cuffless blood pressure measurement using photoplethysmography., , , and . EMBC, page 6385-6388. IEEE, (2016)High Performance Network-on-Chips (NoCs) Design: Performance Modeling, Routing Algorithm and Architecture Optimization.. CoRR, (2014)FSNoC: A Flit-Level Speedup Scheme for Network on-Chips Using Self-Reconfigurable Bidirectional Channels., , and . IEEE Trans. VLSI Syst., 23 (9): 1854-1867 (2015)LRADNN: High-throughput and energy-efficient Deep Neural Network accelerator using Low Rank Approximation., , and . ASP-DAC, page 581-586. IEEE, (2016)