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Post-placement leakage optimization for partially dynamically reconfigurable FPGAs.

, , , and . ISLPED, page 92-97. ACM, (2007)

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Temporal floorplanning using 3D-subTCG., , , and . ASP-DAC, page 725-730. IEEE Computer Society, (2004)Leakage-aware task scheduling for partially dynamically reconfigurable FPGAs., , , and . ACM Trans. Design Autom. Electr. Syst., 14 (4): 52:1-52:26 (2009)BioRoute: A Network-Flow-Based Routing Algorithm for the Synthesis of Digital Microfluidic Biochips., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (11): 1928-1941 (2008)Temporal floorplanning using the T-tree formulation., , and . ICCAD, page 300-305. IEEE Computer Society / ACM, (2004)Post-placement leakage optimization for partially dynamically reconfigurable FPGAs., , , and . ISLPED, page 92-97. ACM, (2007)MP-Trees: A Packing-Based Macro Placement Algorithm for Modern Mixed-Size Designs., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (9): 1621-1634 (2008)A SAT-based routing algorithm for cross-referencing biochips., , , , , and . SLIP, page 1-7. IEEE Computer Society, (2011)Placement of digital microfluidic biochips using the t-tree formulation., , and . DAC, page 931-934. ACM, (2006)Application-specific 3D Network-on-Chip design using simulated allocation., , and . ASP-DAC, page 517-522. IEEE, (2010)Joint exploration of architectural and physical design spaces with thermal consideration., , , and . ISLPED, page 123-126. ACM, (2005)