%0 Conference Paper %1 conf/vlsic/TangWYHCXKWHLLH19 %A Tang, Kea-Tiong %A Wei, Wei-Chen %A Yeh, Zuo-Wei %A Hsu, Tzu-Hsiang %A Chiu, Yen-Cheng %A Xue, Cheng-Xin %A Kuo, Yu-Chun %A Wen, Tai-Hsing %A Ho, Mon-Shu %A Lo, Chung-Chuan %A Liu, Ren-Shuo %A Hsieh, Chih-Cheng %A Chang, Meng-Fan %B VLSI Circuits %D 2019 %I IEEE %K dblp %P 166- %T Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#TangWYHCXKWHLLH19 %@ 978-4-86348-720-8

@inproceedings{conf/vlsic/TangWYHCXKWHLLH19, added-at = {2019-08-05T00:00:00.000+0200}, author = {Tang, Kea-Tiong and Wei, Wei-Chen and Yeh, Zuo-Wei and Hsu, Tzu-Hsiang and Chiu, Yen-Cheng and Xue, Cheng-Xin and Kuo, Yu-Chun and Wen, Tai-Hsing and Ho, Mon-Shu and Lo, Chung-Chuan and Liu, Ren-Shuo and Hsieh, Chih-Cheng and Chang, Meng-Fan}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2ce7312583e458676f20b3d758fcef10d/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2019}, ee = {https://doi.org/10.23919/VLSIC.2019.8778074}, interhash = {e10288864d65eaa4cfcab85c6c4ad954}, intrahash = {ce7312583e458676f20b3d758fcef10d}, isbn = {978-4-86348-720-8}, keywords = {dblp}, pages = {166-}, publisher = {IEEE}, timestamp = {2019-09-27T16:36:31.000+0200}, title = {Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#TangWYHCXKWHLLH19}, year = 2019 }