%0 Conference Paper %1 conf/iscas/ZhouZZ09 %A Zhou, Tracey Y. %A Zhou, Dian %A Zeng, Xuan %B ISCAS %D 2009 %I IEEE %K dblp %P 2753-2756 %T Incremental Circuit Simulation Analysis for Design Modification and Verification. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2009.html#ZhouZZ09 %@ 978-1-4244-3828-0

@inproceedings{conf/iscas/ZhouZZ09, added-at = {2011-06-28T00:00:00.000+0200}, author = {Zhou, Tracey Y. and Zhou, Dian and Zeng, Xuan}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/220a3dc97e6f4c5d659310535b4d20087/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2009}, ee = {http://dx.doi.org/10.1109/ISCAS.2009.5118372}, interhash = {c81c945bec9525a3cde9659dc5624124}, intrahash = {20a3dc97e6f4c5d659310535b4d20087}, isbn = {978-1-4244-3828-0}, keywords = {dblp}, pages = {2753-2756}, publisher = {IEEE}, timestamp = {2016-05-21T09:33:21.000+0200}, title = {Incremental Circuit Simulation Analysis for Design Modification and Verification.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2009.html#ZhouZZ09}, year = 2009 }