%0 Journal Article %1 journals/jssc/HamzaogluABGLLMOPTWZ15 %A Hamzaoglu, Fatih %A Arslan, Umut %A Bisnik, Nabhendra %A Ghosh, Swaroop %A Lal, Manoj B. %A Lindert, Nick %A Meterelliyoz, Mesut %A Osborne, Randy B. %A Park, Joodong %A Tomishima, Shigeki %A Wang, Yih %A Zhang, Kevin %D 2015 %J J. Solid-State Circuits %K dblp %N 1 %P 150-157 %T A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology. %U http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#HamzaogluABGLLMOPTWZ15 %V 50

@article{journals/jssc/HamzaogluABGLLMOPTWZ15, added-at = {2015-01-08T00:00:00.000+0100}, author = {Hamzaoglu, Fatih and Arslan, Umut and Bisnik, Nabhendra and Ghosh, Swaroop and Lal, Manoj B. and Lindert, Nick and Meterelliyoz, Mesut and Osborne, Randy B. and Park, Joodong and Tomishima, Shigeki and Wang, Yih and Zhang, Kevin}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/25d1a34cfb64973a941e806dc60ef582d/dblp}, ee = {http://dx.doi.org/10.1109/JSSC.2014.2353793}, interhash = {a392e733386039973c7fe683d2b9f48e}, intrahash = {5d1a34cfb64973a941e806dc60ef582d}, journal = {J. Solid-State Circuits}, keywords = {dblp}, number = 1, pages = {150-157}, timestamp = {2016-02-02T09:36:59.000+0100}, title = {A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#HamzaogluABGLLMOPTWZ15}, volume = 50, year = 2015 }