%0 Conference Paper %1 conf/vlsid/ChandraPHPR03 %A Chandra, Ramesh %A Panda, Preeti Ranjan %A Henkel, Jörg %A Parameswaran, Sri %A Ramachandran, Loganath %B VLSI Design %D 2003 %I IEEE Computer Society %K dblp %P 18-19 %T Specification and Design of Multi-Million Gate SOCs. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#ChandraPHPR03 %@ 0-7695-1868-0

@inproceedings{conf/vlsid/ChandraPHPR03, added-at = {2015-04-20T00:00:00.000+0200}, author = {Chandra, Ramesh and Panda, Preeti Ranjan and Henkel, Jörg and Parameswaran, Sri and Ramachandran, Loganath}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2941ff2f4486bdf3f32126639648065a4/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2003}, ee = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183107}, interhash = {8b7bdafd0cb177ed148ae4505db68118}, intrahash = {941ff2f4486bdf3f32126639648065a4}, isbn = {0-7695-1868-0}, keywords = {dblp}, pages = {18-19}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T11:08:29.000+0100}, title = {Specification and Design of Multi-Million Gate SOCs.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2003.html#ChandraPHPR03}, year = 2003 }